This invention relates to an input protection circuit and, more particularly, to an input protection circuit for protecting electrostatic breakdown.
A conventional input protection circuit or network is shown in FIG. 7. An input terminal IN is connected to the gate of a MOS FET 30 through a diode 28 and a transistor 29 the other ends of which are connected to the ground terminals GND serving as reference power sources, respectively. This diode 28 is constituted by a p-n junction comprised of an n.sup.+ doped region 31 formed on a p-type semiconductor substrate 1. The n.sup.+ doped region 31 is connected to the input terminal IN and to the gate of the MOS FET 30. The transistor 29 is an NPN transistor comprising n.sup.+ doped regions 31 and 32 formed on the p-type semiconductor substrate 1 so that the n.sup.+ doped regions 31 and 32 are opposite to each other. One n.sup.+ type doped region 32 is connected to the ground terminal GND.
When a negative high potential with respect to the ground level is applied to the input terminal IN, a current flows from the ground terminal GND via the diode 28. In contrast, when a positive high potential with respect to the ground level is applied to the input terminal IN, the p-n junction of the diode 28 breaks down. As a result, a current flows to the ground terminal GND and the transistor which is placed in build-in state is turned on. In addition, an excessive or extra current flows to the ground terminal GND via the transistor 29. Thus, the function of the input protection is performed.
Accordingly as high integration and miniaturization or fineness of MOS integrated circuits have beed developed in recent years, a value higher than electrostatic withstand voltage as required conventionally has been demanded while the thickness of the gate oxide film is thinned. However, the above-mentioned input protection circuit has the problem that the ability of protection against a positive high potential with respect to the ground level GND is weak. Specifically, since the n.sup.+ type doped region 31 of high concentration is formed at the same time on the p-type semiconductor substrate 1 of low concentration while the source and the drain of, e.g., an n channel MOS FET of the MOS integrated circuit are formed, the junction breakdown voltage of the p-n junction of the diode 28 is raised to a higher value, e.g., about 15 volts, resulting in the problem that high electrostatic withstand voltage cannot be obtained.
The breakdown of the p-n junction of the diode 28 occurs at the portion where the electric field concentration appears maximum. However, it is difficult to actually specify the site or position where such a breakdown would occur. It has been ordinarily said that the site where breakdown occurs at the maximum possibility is the portion where the p-n junction curves. However, it is impossible to specify where breakdown occurs, i.e., it takes place at the portion B or C shown in FIG. 7(b). The possibility of occurrence of breakdown is influenced by unevenness or variation of the impurity concentration at the portion. For example, if breakdown occurs at the portion B, the parasitic NPN transistor is likely to be turned on, with the result that strong protection ability becomes effective with respect to the electrostatic breakdown. On the other hand, if breakdown occurs at the portion C, such a protection ability becomes weak. Specifically, there occurs the problem that the protection ability with respect to the electrostatic breakdown is fluctuated by the unevenness or variation of the impurity concentration at the p-n junction of the diode 28.
Moreover, when the p-n junction of the diode 28 breaks down, there is no component serving as a ground contact such as a p.sup.+ impurity region on the side of the p-type semiconductor substrate of low concentration. This results in the problem that a current produced due to the fact that the above junction has broken down strays, leading to the possibility that latch-up etc. are caused particularly in the case of CMOS.
A further problem lies in that when the p-n junction of the diode 28 breaks down, electric field concentrates on, e.g., a corner portion of the n.sup.+ type doped region 31, resulting in the possibility that the breakdown of the junction itself is caused by a large current produced at that portion.
A still further problem is as follows: If breakdown is caused at the p-n junction portion directly below the contact portion between, e.g., the n.sup.+ type doped region 31 and the metal wiring layer 33 connected to the input terminal IN by the inhomogeneity of the impurity concentration at the p-n junction of the diode 28 or other unfavorable phenomena, the metal wiring layer 33 at the contact portion is melted by the heat produced by the breakdown, resulting in the possibility that the breakdown of the p-n junction is caused.
As just described above, the conventional input protection circuit or network has the problem that the protection ability is not fully effective for a high potential with respect to the ground level GND.